Associate Layout Engineer Trainee
| 行业 | Engineering | 职位 | Electronics |
|---|---|---|---|
| 招聘部门 | 招聘人数 | 若干 | |
| 工作地区 | Metro Manila (NCR)Pasig | 工作性质 | Full Time |
| 性别要求 | Male | 婚姻要求 | No marital status restrictions |
| 学历要求 | College Diploma | 工作经验 | 不限 |
| 年龄要求 | 18岁以上 | 待遇水平 | 面议 |
| 更新日期 | 2022-09-27 | 有效期至 | Valid for a long time |
职位描述
Responsibilities:
•Learn and understand the total IC Layout flow and work details
•Perform basic IC Layout tasks at all levels (Chip, Topblock and Block)
•Work closely with leaders and other layout designers to execute project requirements
•Will eventually be part of MD Division's leaders pool to be groomed as Project Leaders
Requirements:
• Graduate of BS Electronics and Communications Engineering or Computer Engineering
•Above average academic credentials specifically in electronic circuits theory and concept. Graduating with honors (e.g. cum laude) is an advantage.
•Exemplary understanding of semiconductor physics specifically BJTs, FETs, MOS and CMOS
•Self-motivated and would like to pursue a career in physical design of integrated circuits
•Demonstrated ability of working independently as well as within a dynamic team environment. Leaders of student councils, group projects, or school clubs are added credentials.
•A fast-learner with the ability to take initiatives and learn on the job
•Excellent verbal and written communications skills
•Strong time-management skills and multi-tasking ability
•Has good problem-solving and analytical skills. Ability to think out-of-the -box
•IC Layout or PCB Layout experience is also an advantage, though not necessary